USART Implementation using Verilog with Cypress-II

USART Implementation using Verilog with Cypress-II

AngličtinaMěkká vazbaTisk na objednávku
Reddy, Bathula Siva Kumar
LAP Lambert Academic Publishing
EAN: 9783659831447
Tisk na objednávku
Předpokládané dodání v pátek, 21. června 2024
1 056 Kč
Běžná cena: 1 173 Kč
Sleva 10 %
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Podrobné informace

A universal synchronous asynchronous receiver / transmitter (USART) is a block of computer hardware that translates data between parallel and serial forms. The universal designation indicates that the data format and transmission speeds are configurable and that the actual electric signaling levels and typically is handled by a special driver circuit external to the USART. A USART is usually an individual (or part of an) integrated circuit used for serial communications over a computer or peripheral device serial port. In this book, the comprehensive research is put forward for an implementation on the basis of extensive reading and studying of associated papers and literature in this research area. The book caters to the needs of research fraternity and students in the field of VLSI and Embedded Systems design. The requirement for the readers of this book is to be familiar with the basics of Verilog, however R & D engineers from industry community working under Electronics group can also benefit from this book as a supplementary reference.
EAN 9783659831447
ISBN 3659831441
Typ produktu Měkká vazba
Vydavatel LAP Lambert Academic Publishing
Stránky 80
Jazyk English
Rozměry 220 x 150
Autoři Reddy, Bathula Siva Kumar