Logic Synthesis for Finite State Machines Based on Linear Chains of States

Logic Synthesis for Finite State Machines Based on Linear Chains of States

AngličtinaMěkká vazbaTisk na objednávku
Barkalov Alexander
Springer, Berlin
EAN: 9783319867144
Tisk na objednávku
Předpokládané dodání v pátek, 28. června 2024
2 633 Kč
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Podrobné informace

This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state counter. They also put forward an approach allowing linear chains of states to be created, which simplifies the system of input memory functions and, therefore, decreases the number of LUTs in the resulting FSM circuit. The authors combine this approach with using EMBs to implement the system of output functions (microoperations). This allows a significant decrease in the number of LUTs, as well as eliminating a lot of interconnections in the FSM logic circuit. As a rule, it also reduces the area occupied by the circuit and diminishes the resulting power dissipation.

This book is an interesting and valuable resource for students and postgraduates in the area of computer science, as well as for designers of digital systems that included complex control units

EAN 9783319867144
ISBN 3319867148
Typ produktu Měkká vazba
Vydavatel Springer, Berlin
Datum vydání 12. května 2018
Stránky 225
Jazyk English
Rozměry 235 x 155
Země Switzerland
Sekce Professional & Scholarly
Autoři Barkalov Alexander; Bieganowski, Jacek; Titarenko Larysa
Ilustrace VIII, 225 p. 145 illus.
Edice Softcover reprint of the original 1st ed. 2018
Série Studies in Systems, Decision and Control